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TISP6NTP2A Programmable Protector
Description (continued)
These systems often have the need to source two POTS (Plain Old Telephone Service) lines, one for a telephone and the other for a facsimile
machine. In a single surface mount package, the TISP6NTP2A protects the two POTS line SLICs (Subscriber Line Interface Circuits) against
overvoltages caused by lightning, a.c. power contact and induction.
The TISP6NTP2A has an array of four buffered P-gate forward conducting thyristors with twin commoned gates and a common anode
connection. Each thyristor cathode has a separate terminal connection. An antiparallel anode-cathode diode is connected across each
thyristor. The buffer transistors reduce the gate supply current.
In use, the cathodes of an TISP6NTP2A thyristor are connected to the four conductors of two POTS lines (see applications information). Each
gate is connected to the appropriate negative voltage battery feed of the SLIC driving that line pair. By having separate gates, each SLIC can
be protected at a voltage level related to the negative supply voltage of that individual SLIC. The anode of the TISP6NTP2A is connected to the
SLIC common.
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2A antiparallel diode. Negative overvoltages are initially
clipped close to the SLIC negative supply by emitter follower action of the TISP6NTP2A buffer transistor. If sufficient clipping current flows, the
TISP6NTP2A thyristor will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding current of
the TISP6NTP2A helps prevent d.c. latchup.
Absolute Maximum Ratings, TA = 25 ° C (Unless Otherwise Noted)
Rating
Repetitive peak off-state voltage, I G = 0,- 40 ° C ≤ T J ≤ 85 ° C
Repetitive peak gate-cathode voltage, V KA = 0, - 40 ° C ≤ T J ≤ 85 ° C
Symbol
V DRM
V GKRM
Value
-100
-90
Unit
V
V
Non-repetitive peak on-state pulse current, -40 ° C ≤ T J ≤ 85 ° C, (see Notes 1 and 2)
10/1000 μ s (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
20
0.2/310 μ s (I3124, open-circuit voltage wave shape 0.5/700 μ s)
5/310 μ s (ITU-T K.20 & K.21, open-circuit voltage wave shape 10/700 μ s)
8/20 μ s (IEC 61000-4-5:1995, open-circuit voltage wave shape 1.2/50 μ s)
2/10 μ s (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
I TSP
25
25
75
85
A
Non-repetitive peak on-state current, 50/60 Hz, -40 ° C ≤ T J ≤ 85 ° C, (see Notes 1 and 2)
100 ms
7
1s
5s
300 s
900 s
Non-repetitive peak gate current, 1/2 μ s pulse, cathodes commoned (see Note 1)
Operating free-air temperature range
Junction temperature
Storage temperature range
I TSM
I GSM
T A
T J
T stg
2.7
1.5
0.45
0.43
25
-40 to +85
-40 to +150
-65 to +150
A
A
° C
° C
° C
NOTES: 1. Initially, the protector must be in thermal equilibrium with -40 ° C ≤ T J ≤ 85 ° C. The surge may be repeated after the device returns
to its initial conditions.
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied to any cathode-
anode terminal pair. Additionally, all cathode-anode terminal pairs may have their rated current values applied simultaneously (in
this case the anode terminal current will be four times the rated current value of an individual terminal pair). Above 85 ° C, derate
linearly to zero at 150 ° C lead temperature.
JUNE 1998 - REVISED JULY 2008
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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